Description
The M16C/62N group of single-chip microcomputers are built using the high-performance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruction efficiency. With 1M bytes of address space, low voltage (2.4V(mask ROM version is 2.2V) to 3.6V), they are capable of executing instructions at high speed. They also feature a built-in multiplier and DMAC, making them ideal for controlling office, communications, industrial equipment, and other high-speed processing applications.
Features
• Memory capacity..................................ROM (See Figure 1.1.4. ROM Expansion) RAM 10K to 20K bytes
• Shortest instruction execution time ......62.5ns (f(XIN)=16MHZ, VCC=3.0V to 3.6V) 142.9ns (f(XIN)=7MHZ, VCC=2.4V to 3.6V without software wait)
• Supply voltage .....................................3.0V to 3.6V (f(XIN)=16MHZ, without software wait) 2.4V to 3.0V (f(XIN)=7MHZ, without software wait) 2.2V to 3.0V (f(XIN)=7MHZ, with software one-wait) :mask ROM version
• Low power consumption ......................34.0mW (VCC = 3V, f(XIN)=10MHZ, without software wait) 66.0mW (VCC = 3.3V, f(XIN)=16MHZ, without software wait)
• Interrupts..............................................25 internal and 8 external interrupt sources, 4 software interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer......................5 output timers + 6 input timers
• Serial I/O ..............................................5 channels (3 for UART or clock synchronous, 2 for clock synchronous)
• DMAC ..................................................2 channels (trigger: 24 sources)
• A-D converter.......................................10 bits X 8 channels (Expandable up to 18 channels)
• D-A converter.......................................8 bits X 2 channels
• CRC calculation circuit.........................1 circuit
• Watchdog timer....................................1 line
• Programmable I/O ...............................87 lines
• Input port..............................................1 line (P85 shared with NMI pin)
• Memory expansion ..............................Available (to 4M bytes)
• Chip select output ................................4 lines
• Clock generating circuit .......................2 built-in clock generation circuits (built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
M30624FGNFP
Renesas(瑞萨)
8846
标准封装
M30624FGNFP
RENESAS
30
M30624FGNFP
RENESAS
70000
N/A
M30624FGNFP
Renesas
20000
NA
M30624FGNFP
RENESAS
1000
QFP
M30624FGNFP
MITSUBISHI
8659
BGAQFP
M30624FGNFP
RENESAS
29781
QFP100
M30624FGNFP
MIT
320
QFP
M30624FGNFP
3000
M30624FGNFP
RENESAS/瑞萨
17
QFP100
M30624FGNFP
RENESAS
276
QFP100
M30624FGNFP
MIT
9600
SOT-23
M30624FGNFP
MITSUBISHI
1527
QFP
M30624FGNFP
RENESAS
1000
QFP
M30624FGNFP
MIT
100500
QFP
SmartFusion2 SoC FPGA Hello M2S010 SmartFusion®2 FPGA + MCU/MPU SoC 评估板
发布时间:2024-01-04