3-to-8-Line Decoder/Demultiplexer
This schottky-clamped TTL MSI circuit is designed to be used in high-performance memory-decording or data-routing applications requiring very short propagation delay time. In high-performance memory systems this decode can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit the delay times of this decorder and the enable time of the memory are usually less than the typical access times of the memory. This means that the effective system delay introduced by the schottky-clampled system decoder is negligible.
• Designed Specifically for High Speed Memory Decoders and Data Transmission Systems
• Incorporate 3 Enabler Inputs to Simplify Cascading AND/OR Data Reception
• Schottky Clamped for High Performance
AMD
80000
PLCC68
amd
500000
INTEL
123
PLCC
INNO
9850
QFP44
INCOME
30000
SOT23-3
INTEL
200
PLCC
INNO
15000
QFP44
INTEL
20000
PLCC
AMD
2987
PLCC
AMD
205
PLCC68
AMD
27003
NA
IKS
880000
SOP-16
RICHTEK/立锜
880000
QFN
RICHTEK/立锜
880000
QFN24
AMD
9888
SMD-PLCC68