General Description

This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned OFF presenting a high-imped ance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.

• 74LS367
• 74LS367
• 74LS367
• 74LS367
• 74LS367
• 74LS367
• HD74LS367AP
• SN74LS367A
• SN74LS367AJ
• SN74LS367AJ
• SN74LS367AN
• SN74LS367AN
• SN74LS367AN
• SN74LS367N