4-STAGE PRESETTABLE RIPPLE COUNTERS
The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1) sequence or in a bi-quinary mode producing a 50 duty cycle output. The SN54/74LS197 contains divide-by-two and divide-by-eight sections which can be combined to form a modulo-16 binary counter. Low Power Schottky technology is used to achieve typical count rates of 70 MHz and power dissipation of only 80 mW.
• Low Power Consumption — Typically 80 mW
• High Counting Rates — Typically 70 MHz
• Choice of Counting Modes — BCD, Bi-Quinary, Binary
• Asynchronous Presettable
• Asynchronous Master Reset
• Easy Multistage Cascading
• Input Clamp Diodes Limit High Speed Termination Effects
TI
5000
DIP
TI
5642
TI(德州仪器)
3600
CDIP-14
NS/国半
66800
SOP
NS/国半
12245
CDIP
FAIRCHILD/仙童
1556
CDIP
National Semiconductor
16500
National Semiconductor
2000
14-CERDIP
MOTOROLA/摩托罗拉
22055
CDIP14
FAIRCHILD/仙童
3982
DIP
NS
185
SOP
FSC
2600
CDIP14
MOT
5000
DIP