FUNCTIONAL DESCRIPTION
The 3D3225 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 0.75ns through 700ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D3225 is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.
FEATURES
• All-silicon, low-power CMOS technology
• TTL/CMOS compatible inputs and outputs
• Vapor phase, IR and wave solderable
• Auto-insertable (DIP pkg.)
• Low ground bounce noise
• Leading- and trailing-edge accuracy
• Delay range: 0.75ns through 3500ns
• Delay tolerance: 2 or 0.5ns
• Temperature stability: ±2 typical (-40C to 85C)
• Vdd stability: ±1 typical (3.0V-3.6V)
• Minimum input pulse width: 30 of total delay
• 8-pin Gull-Wing available as drop-in replacement for hybrid delay lines
TI/德州仪器
824
CDIP
DATA
6500
SOP16
5000
SOP
N/A
9850
SOP16
JST/日压
343380
/
SSS
30
AMETHERM
7652
车规-热敏电阻
YCL-卓智
3280
车规-电源模块
TRIDENT
890000
QFP208
ALTECH CORP
880000
SMD
3D-PLUS
100500
20
Data Delay Devices, Inc.
1
TI
6800
S0P-16
20000
DIP14
Ametherm
17900
SMD