General Description
The 100354 contains eight D-type edge triggered, master/slave flip-flops with individual inputs (Dn), true outputs (Qn), a clock input (CP), an output enable pin (OEN), and a common clock enable pin (CEN). Data enters the master when CP is LOW and transfers to the slave when CP goes HIGH. When the CEN input goes HIGH it overrides all other inputs, disables the clock, and the Q outputs maintain the last state.
Features
■ Cut-off drivers
■ Drives 25Ω load
■ Low power operation
■ 2000V ESD protection
■ Voltage compensated operating range = −4.2V to −5.7V
■ Available to industrial grade temperature range
NSC
1350
CDIP24
SEAGATE
2900
QFP
TI
22412
-
AMPHENOL/安费诺
13250
连接器
NSC
9850
CDIP24
FCI
1222
CONNECTOR
NSC
586
NA
NS
1482
PLCC
FAIRCHILD
52
Amphenol(安费诺)
15000
NA
AMPHENOL/安费诺
6540
FCI
880000
NA
FCI
880000
DIP
NS
8630
FP-24
FCI
28315
CONN